The History of Silicon Scaling: Abridged
CMOS technologies and innovations for 2nm and beyond « Pradeep's Techpoints!
Ultra-Scaled FETs \\ The Nanoelectronic Modeling Group \\ Purdue University
Feature Size of Transistors
![Editorial] Making Semiconductor History: Contextualizing Samsung's Latest Transistor Technology – Samsung Global Newsroom](https://img.global.news.samsung.com/global/wp-content/uploads/2019/05/GAA_thumb728F.jpg "Editorial] Making Semiconductor History: Contextualizing Samsung's Latest Transistor Technology – Samsung Global Newsroom")
Editorial] Making Semiconductor History: Contextualizing Samsung's Latest Transistor Technology – Samsung Global Newsroom
Transistor scaling with novel materials - ScienceDirect
Transistor scaling with novel materials - ScienceDirect
Prediction of scale down of transistor by ST Microelectronics for UTBB... | Download Scientific Diagram
cmos - How do processor transistor counts keep increasing, without geometric scaling? - Electrical Engineering Stack Exchange
Transistor Scale of Integration
Intel transistor size and Dennard scaling | Download Scientific Diagram
Moore's law - Wikipedia
nanoHUB.org - Resources: Transistor Scaling: The Age of Innovation: Watch Presentation
Nanomaterials | Free Full-Text | Poole–Frenkel (PF)-MOS: A Proposal for the Ultimate Scale of an MOS Transistor
a) The evolution of transistor density scaling. Reprinted with... | Download Scientific Diagram
IBM and Samsung Team Up to “Defy Conventional Transistor Design” - News
Researchers develop nanometer-scale adaptive transistor
The History of Silicon Scaling: Abridged
nanoHUB.org - Resources: Transistor Scaling: The Age of Innovation: Watch Presentation
Scaling Up And Down
CMOS Scaling Trends and Beyond
Field-effect transistor - Wikipedia
Intel is keeping Moore's Law alive by making bigger improvements less often | Ars Technica
